EPM7192GC160-20
.png "CPLD>EPM7192GC160-20")
| ： | EPM7192GC160-20 |
|---|---|
| ： | CPLDs |
| ： | Altera |
| ： | 5V 2.54mm P |
| ： | - |
| ： | - |
| ： | 120 |
| ： | YES |
EPM7192GC160-20
:
EPM7192GC160-20
Manufacturer:
Altera
Package:
-
Encapsulation:
-
Batch number:
Quantity:
120
Pricing(UCD):
| TYPE | DESCRIPTION |
| Surface Mount | NO |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 160 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | 192 MACROCELLS; SHARED INPUT/CLOCK |
| HTS Code | 8542.39.00.01 |
| Terminal Position | PERPENDICULAR |
| Terminal Form | PIN/PEG |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 160 |
| JESD-30 Code | S-CPGA-P160 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 70°C |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 5V |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Number of I/O | 120 |
| Clock Frequency | 62.5MHz |
| Propagation Delay | 20 ns |
| Organization | 0 DEDICATED INPUTS, 120 I/O |
| Programmable Logic Type | EE PLD |
| Output Function | MACROCELL |
| Number of Macro Cells | 192 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Length | 39.624mm |
| Height Seated (Max) | 5.34mm |
| Width | 39.624mm |
| RoHS Status | Non-RoHS Compliant |
 | |
| Orignal genuine | Each chip comes from the original factory |
| |
| Main products | Only make original stock |
| |
| Spot inventory | Only make original stock |
| |
| Original stock | Bom Distributio | Affordable Price |
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